| US 7,464,351 B2 | ||
| Method enabling a standard CMOS fab to produce an IC to sense three-dimensional information using augmented rules creating mask patterns not otherwise expressible with existing fab rules | ||
| Cyrus Bamji, Fremont, Calif. (US); and Xinqiao Liu, San Jose, Calif. (US) | ||
| Assigned to Canesta, Inc., Sunnyvale, Calif. (US) | ||
| Filed on Dec. 30, 2004, as Appl. No. 11/28,290. | ||
| Application 11/028290 is a division of application No. 10/464299, filed on Jun. 17, 2003, granted, now 6,906,793. | ||
| Application 10/464299 is a continuation in part of application No. 10/020339, filed on Dec. 11, 2001, granted, now 6,580,496. | ||
| Claims priority of provisional application 60/400002, filed on Jul. 29, 2002. | ||
| Claims priority of provisional application 60/396422, filed on Jul. 15, 2002. | ||
| Claims priority of provisional application 60/393408, filed on Jul. 01, 2002. | ||
| Claims priority of provisional application 60/254873, filed on Dec. 11, 2000. | ||
| Claims priority of provisional application 60/247158, filed on Nov. 09, 2000. | ||
| Prior Publication US 2005/0156121 A1, Jul. 21, 2005 | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—5 [716/19] | 12 Claims |
| 1. A method for use with a CMOS fab that provides a set of rules and a set of drawn layers in an existing relationship that
defines a set of expressible mask patterns used to create an integrated circuit (IC) structure, the method enabling fabrication
by said CMOS fab of an IC sensor structure whose fabrication by said CMOS fab requires mask patterns not expressible using
the provided said set of rules and said set of drawn layers in said existing relationship, the method comprising the following
steps:
(a) using at least one layer in said set of drawn layers in fabricating said IC sensor structure;
(b) modifying at least one rule in the provided said set of rules to modify said existing relationship provided by said CMOS
fab:
(c) using at least one rule modified at step (b) to express at least one mask pattern for said IC sensor structure not expressible
otherwise within said existing relationship provided by said CMOS fab; and
(d) using step (a), step (b), and step (c), fabricating said IC sensor structure in said CMOS fab;
wherein said method enables said CMOS fab to produce said IC sensor structure with at least one sensor characteristic superior
to that of an IC produced by said CMOS fab without using said method.
|