| US 7,463,047 B2 | ||
| Increase productivity at wafer test using probe retest data analysis | ||
| Akiko F. Balchiunas, Hinesburg, Vt. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Apr. 18, 2007, as Appl. No. 11/736,600. | ||
| Application 11/736600 is a continuation of application No. 10/709729, filed on May 25, 2004, granted, now 7,253,650, filed on Aug. 07, 2007. | ||
| Prior Publication US 2007/0288190 A1, Dec. 13, 2007 | ||
| Int. Cl. G01R 31/26 (2006.01) | ||
| U.S. Cl. 324—763 [324/765; 324/73.1] | 10 Claims |
| 1. A method for testing integrated circuit devices after manufacture, said method comprising:
testing a group of devices to produce a failing group of devices that failed said testing, wherein said devices in said failing
group are identified by type of defect;
sorting said failing group into devices that have types of defects approved for retesting, said types of defects approved
for retesting comprising types of defects having previously determined retest passing rates above a predetermined threshold,
and into devices that do not have said types of defects approved for retesting; and
retesting only said devices in said failing group that have at least one of said types of defects approved for retesting so
that said retesting process is optimized.
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