| US 7,462,943 B2 | ||
| Semiconductor assembly for improved device warpage and solder ball coplanarity | ||
| Patricio A Ancheta, Jr., Baguio (Philippines); Ramil A Viluan, Baguio (Philippines); James R. M. Baello, Quezon (Philippines); and Elaine B Reyes, Baguio (Philippines) | ||
| Assigned to Texas Instruments Incorporated, Dallas, Tex. (US) | ||
| Filed on Jun. 13, 2007, as Appl. No. 11/762,186. | ||
| Application 11/762186 is a division of application No. 11/253940, filed on Oct. 19, 2005, granted, now 7,224,636. | ||
| Prior Publication US 2008/0142949 A1, Jun. 19, 2008 | ||
| Int. Cl. H01L 29/40 (2006.01); H01L 21/00 (2006.01); H01L 21/30 (2006.01) | ||
| U.S. Cl. 257—783 [257/777; 257/E27.137; 257/E21.122; 257/E21.48; 257/E21.519; 438/106; 438/107; 438/455; 438/457] | 7 Claims |
| 1. A semiconductor device comprising:
a semiconductor chip, its position defining a plane;
an insulating substrate having first and second surfaces, the substrate substantially coplanar with the chip;
one of the chip sides attached to the first substrate surface using adhesive material, the material having a thickness;
the adhesive material thickness distributed so that the thickness under the central chip area is smaller than the material
thickness under the peripheral chip areas; and
encapsulation compound embedding all remaining chip sides and the portions of the first substrate surface not involved in
the chip attachment.
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