| US 7,586,081 B2 | ||
| Output impedance varying circuit | ||
| Hiroshi Yamaguchi, Osaka (Japan); and Masaki Taniguchi, Kyoto (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Mar. 24, 2008, as Appl. No. 12/76,788. | ||
| Application 12/076788 is a division of application No. 11/329029, filed on Jan. 11, 2006, granted, now 7,365,302. | ||
| Claims priority of application No. 2005-119382 (JP), filed on Apr. 18, 2005. | ||
| Prior Publication US 2008/0179501 A1, Jul. 31, 2008 | ||
| Int. Cl. G01J 1/44 (2006.01); H01J 40/14 (2006.01); H03F 3/08 (2006.01) | ||
| U.S. Cl. 250—214R [327/330] | 2 Claims |
| 1. An output impedance varying circuit for adjusting an output impedance of a photo detector IC having an output terminal
connected to a flexible printed circuit board in an apparatus for optically recording/playing back information, without causing
attenuation of a required signal bandwidth while suppressing occurrence of peaking, the output impedance varying circuit comprising:
an output circuit of the photo detector IC,
an impedance varying circuit provided between an output of the output circuit and the output terminal,
a first NPN transistor having an emitter connected to the output of the output circuit and a collector and a base connected
to a first variable current source,
a first PNP transistor having an emitter connected to the output of the output circuit and a collector and a base connected
to a second variable current source,
a second NPN transistor having a base connected to the base of the first NPN transistor and an emitter connected to the output
terminal,
a second PNP transistor having a base connected to the base of the first PNP transistor and an emitter connected to the output
terminal; and
a resultant resistance of an emitter resistance of the second NPN transistor and an emitter resistance of the second PNP transistor
is adjusted by current values of the first and second variable current sources.
|