| US 7,585,761 B2 | ||
| Manufacturing method of semiconductor device | ||
| Shunpei Yamazaki, Setagaya (Japan); and Mitsuaki Osame, Atsugi (Japan) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (Japan) | ||
| Filed on Jul. 14, 2006, as Appl. No. 11/486,149. | ||
| Application 11/486149 is a division of application No. 10/659585, filed on Sep. 11, 2003, granted, now 7,094,684. | ||
| Claims priority of application No. 2002-276379 (JP), filed on Sep. 20, 2002. | ||
| Prior Publication US 2006/0252260 A1, Nov. 09, 2006 | ||
| Int. Cl. H01L 21/4763 (2006.01) | ||
| U.S. Cl. 438—626 [257/E21.597] | 30 Claims |
| 1. A method of manufacturing a semiconductor device comprising the steps of:
forming a semiconductor layer comprising an impurity region;
forming a gate electrode over the semiconductor layer through a first insulating film;
forming a second insulating film over the gate electrode;
forming a contact hole in the second insulating film to reach the impurity region;
forming a first conductive film with a property as a barrier over the second insulating film;
patterning the first conductive film;
forming a second conductive film containing copper as its main component on the patterned first conductive film through an
opening of a mask; and
reducing a width of the second conductive film with dry etching to form a wiring electrically connected to the impurity region
over the second insulating film, the wiring including the patterned first conductive film and the second conductive film.
|