| US 7,580,308 B2 | ||
| Semiconductor memory device and refresh method for the same | ||
| Hajime Sato, Kasugai (Japan); Yuji Nakagawa, Kasugai (Japan); and Satoru Kawamoto, Kasugai (Japan) | ||
| Assigned to Fujitsu Microelectronics Limited, Tokyo (Japan) | ||
| Filed on Jun. 19, 2007, as Appl. No. 11/812,420. | ||
| Application 11/812420 is a division of application No. 11/070888, filed on Mar. 03, 2005, granted, now 7,248,525. | ||
| Prior Publication US 2007/0247949 A1, Oct. 25, 2007 | ||
| Int. Cl. G11C 7/00 (2006.01) | ||
| U.S. Cl. 365—222 [365/189.09; 365/230.06] | 6 Claims |

| 1. A method for selectively refreshing a plurality of memory cell blocks of a semiconductor memory device in refresh mode,
wherein the semiconductor memory device includes a plurality of word line drive circuits each for driving a word line of the
corresponding memory cell block, the method comprising:
selecting one of the plurality of memory cell blocks in the refresh mode; and
deactivating one or more word line drive circuits associated with one or more memory cell blocks that have not been selected,
and controlling one or more word lines, which are associated with the one or more memory cell blocks that have not been selected,
to have a floating potential.
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