| US 7,579,931 B2 | ||
| Surface acoustic wave filter element, surface acoustic wave filter and communication device using the same | ||
| Hiroyuki Nakamura, Katano (Japan); Keiji Onishi, Settsu (Japan); Akio Tsunekawa, Moriguchi (Japan); and Shigeru Tsuzuki, Neyagawa (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Jun. 24, 2005, as Appl. No. 11/166,810. | ||
| Application 11/166810 is a continuation of application No. 10/283375, filed on Oct. 29, 2002, granted, now 6,930,570. | ||
| Claims priority of application No. 2001-330435 (JP), filed on Oct. 29, 2001. | ||
| Prior Publication US 2005/0255824 A1, Nov. 17, 2005 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H04B 1/10 (2006.01); H04B 1/16 (2006.01) | ||
| U.S. Cl. 333—186 [455/286; 455/307; 455/339; 333/133; 333/193] | 45 Claims |
| 1. A surface acoustic wave filter element comprising:
a piezoelectric substrate; and
a plurality of inter-digital transducer(IDT) electrodes formed on said piezoelectric substrate,
wherein at least one of said plurality of IDT electrodes is connected to a balanced type terminal and other IDT electrodes
are connected to balanced type terminals or unbalanced type terminals,
first wiring electrode means which is connected to said at least one IDT electrode and second wiring electrode means which
is connected to said other IDT electrodes are disposed on planes different from each other, and
one of said first and second wiring electrode means is connected to electrode fingers on one side of said one or other IDT
electrodes through at least one of one or plural electrode pads, one or plural via holes, and one or plural bumps, said electrode
pads and/or said bumps being provided on at least said piezoelectric substrate.
|