US 7,573,086 B2
TaN integrated circuit (IC) capacitor
Michael LeRoy Huber, Sachse, Tex. (US); Gregory Lee Hendy, Murphy, Tex. (US); Evelyn Anne Lafferty, Frisco, Tex. (US); George Nicholas Harakas, Garland, Tex. (US); Salvatore Frank Pavone, Murphy, Tex. (US); Blake Ryan Pasker, Wylie, Tex. (US); Courtney Michael Hazelton, Dallas, Tex. (US); and James Wayne Klawinsky, Irving, Tex. (US)
Assigned to Texas Instruments Incorporated, Dallas, Tex. (US)
Filed on Aug. 26, 2005, as Appl. No. 11/212,455.
Prior Publication US 2007/0045774 A1, Mar. 01, 2007
Int. Cl. H01L 29/94 (2006.01)
U.S. Cl. 257—306  [257/532; 257/535; 257/E21.396; 438/437; 427/79] 19 Claims
OG exemplary drawing
 
1. A semiconductor structure having a cross section comprising:
a dielectric layer within a semiconductor substrate; and
a TaN capacitor having a portion overlying the dielectric layer and comprising:
a bottom conductive plate on the dielectric layer and electrically isolated from the semiconductor substrate by the dielectric layer;
a capacitor dielectric located in contact with the bottom conductive plate, wherein the capacitor dielectric comprises a poly metal dielectric (PMD) nitride liner; and
a top conductive plate located in contact with the capacitor dielectric, where the top conductive plate comprises TaN and excludes copper, and where at least a portion of the capacitor is formed on the semiconductor substrate.