| US 7,552,417 B2 | ||
| System for search and analysis of systematic defects in integrated circuits | ||
| Bette L. Bergman Reuter, Essex Junction, Vt. (US); David L. DeMaris, Austin, Tex. (US); Mark A. Lavin, Katonah, N.Y. (US); William C. Leipold, Enosburg Falls, Vt. (US); Daniel N. Maynard, Craftsbury Common, Vt. (US); and Maharaj Mukherjee, Wappingers Falls, Vt. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Jun. 04, 2008, as Appl. No. 12/132,710. | ||
| Application 11/748575 is a division of application No. 10/605849, filed on Oct. 30, 2003, granted, now 7,284,230. | ||
| Application 12/132710 is a continuation of application No. 11/748575, filed on May 15, 2007, granted, now 7,415,695. | ||
| Prior Publication US 2008/0232675 A1, Sep. 25, 2008 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—21 [716/4; 716/5; 716/19] | 7 Claims |
| 1. A program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine
to perform a method of locating systematic defects in integrated circuits, said method comprising:
performing preliminary extracting and index processing of a circuit design comprising:
transforming shapes in a circuit layout into feature vectors; and
comparing said feature vectors to produce an index of feature vectors; and
after performing said preliminary extracting and index processing, performing a process of feature searching comprising:
identifying a defect region of said circuit layout;
transforming shapes in said defect region into defect vectors; and
finding feature vectors that are similar to said defect vectors using said index of feature vectors.
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