| US 7,476,579 B2 | ||
| Method and structure for enhancing both nMOSFET and pMOSFET performance with a stressed film | ||
| Huilong Zhu, Poughkeepsie, N.Y. (US); Jing Wang, Beacon, N.Y. (US); Bruce B. Doris, Brewster, N.Y. (US); and Zhibin Ren, Hopewell Junction, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Nov. 17, 2006, as Appl. No. 11/560,925. | ||
| Application 11/560925 is a division of application No. 11/164224, filed on Nov. 15, 2005, granted, now 7,183,613. | ||
| Prior Publication US 2007/0122961 A1, May 31, 2007 | ||
| Int. Cl. H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—197 [438/483; 257/351; 257/18; 257/E29.193] | 4 Claims |
| 1. A method of forming a semiconductor structure comprising:
providing first and second gate stacks disposed adjacent one another on a substrate, wherein said first gate stack has a first
height and said second gate stack has a second height less than said first height;
forming a stressing layer over said first and second gate stacks so that a stress of a first type is formed in the substrate
under said first and said second gate stacks; and
forming an opening in said stressing layer at a distance from said second gate stack so that a stress of a second type is
formed in the substrate under said second gate conductor while said stress of said first type remains under said first gate
stack, wherein said opening is formed completely around a perimeter of said second gate stack.
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