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| Class 438 | SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS |
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![[List of Pre Grant Publications for class 438 subclass 1]](../as.gif) | ![[List of Patents for class 438 subclass 1]](../ps.gif) | 1 | HAVING BIOMATERIAL COMPONENT OR INTEGRATED WITH LIVING ORGANISM |
| | 2 | HAVING SUPERCONDUCTIVE COMPONENT |
| | 3 | HAVING MAGNETIC OR FERROELECTRIC COMPONENT |
| | 4 | REPAIR OR RESTORATION |
| | 5 | INCLUDING CONTROL RESPONSIVE TO SENSED CONDITION |
| | 6 |  Interconnecting plural devices on semiconductor substrate |
| | 7 | Optical characteristic sensed |
| | 10 | Electrical characteristic sensed |
| | 14 | WITH MEASURING OR TESTING |
| | 15 | Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 16 | Optical characteristic sensed |
| | 17 | Electrical characteristic sensed |
| | 19 | HAVING INTEGRAL POWER SOURCE (E.G., BATTERY, ETC.) |
| | 20 | ELECTRON EMITTER MANUFACTURE |
| | 21 | MANUFACTURE OF ELECTRICAL DEVICE CONTROLLED PRINTHEAD |
| | 22 | MAKING DEVICE OR CIRCUIT EMISSIVE OF NONELECTRICAL SIGNAL |
| | 23 | Having diverse electrical device |
| | 26 | Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 29 | Including integrally formed optical element (e.g., reflective layer, luminescent material, contoured surface, etc.) |
| | 33 | Substrate dicing |
| | 34 | Making emissive array |
| | 36 | Ordered or disordered |
| | 37 | Graded composition |
| | 38 | Passivating of surface |
| | 39 | Mesa formation |
| | 42 | Groove formation |
| | 45 | Dopant introduction into semiconductor region |
| | 46 | Compound semiconductor |
| | 48 | MAKING DEVICE OR CIRCUIT RESPONSIVE TO NONELECTRICAL SIGNAL |
| | 49 | Chemically responsive |
| | 50 | Physical stress responsive |
| | 51 |  Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 52 | Having cantilever element |
| | 53 | Having diaphragm element |
| | 54 | Thermally responsive |
| | 56 | Responsive to corpuscular radiation (e.g., nuclear particle detector, etc.) |
| | 57 | Responsive to electromagnetic radiation |
| | 58 | Gettering of substrate |
| | 59 | Having diverse electrical device |
| | 61 | Continuous processing |
| | 63 | Particulate semiconductor component |
| | 64 | Packaging (e.g., with mounting, encapsulating, etc.) or treatment of packaged semiconductor |
| | 65 |  Having additional optical element (e.g., optical fiber, etc.) |
| | 66 | Plural responsive devices (e.g., array, etc.) |
| | 68 | Substrate dicing |
| | 69 | Including integrally formed optical element (e.g., reflective layer, luminescent layer, etc.) |
| | 70 | Color filter |
| | 71 | Specific surface topography (e.g., textured surface, etc.) |
| | 72 | Having reflective or antireflective component |
| | 73 | Making electromagnetic responsive array |
| | 74 | Vertically arranged (e.g., tandem, stacked, etc.) |
| | 75 | Charge transfer device (e.g., CCD, etc.) |
| | 76 |  Majority signal carrier (e.g., buried or bulk channel, peristaltic, etc.) |
| | 77 | Compound semiconductor |
| | 78 | Having structure to improve output signal (e.g., exposure control structure, etc.) |
| | 80 | Lateral series connected array |
| | 82 | Having organic semiconductor component |
| | 83 | Forming point contact |
| | 84 | Having selenium or tellurium elemental semiconductor component |
| | 85 | Having metal oxide or copper sulfide compound semiconductive component |
| | 87 | Graded composition |
| | 88 | Direct application of electric current |
| | 89 | Fusion or solidification of semiconductor region |
| | 90 | Including storage of electrical charge in substrate |
| | 91 | Avalanche diode |
| | 92 | Schottky barrier junction |
| | 93 | Compound semiconductor |
| | 94 | Heterojunction |
| | 95 | Chalcogen (i.e., oxygen (O), sulfur (S), selenium (Se), tellurium (Te)) containing |
| | 96 | Amorphous semiconductor |
| | 97 | Polycrystalline semiconductor |
| | 98 | Contact formation (i.e., metallization) |
| | 99 | HAVING ORGANIC SEMICONDUCTIVE COMPONENT |
| | 100 | MAKING POINT CONTACT DEVICE |
| | 102 | HAVING SELENIUM OR TELLURIUM ELEMENTAL SEMICONDUCTOR COMPONENT |
| | 104 | HAVING METAL OXIDE OR COPPER SULFIDE COMPOUND SEMICONDUCTOR COMPONENT |
| | 105 | HAVING DIAMOND SEMICONDUCTOR COMPONENT |
| | 106 | PACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTOR |
| | 107 | Assembly of plural semiconductive substrates each possessing electrical device |
| | 110 | Making plural separate devices |
| | 115 | Including contaminant removal or mitigation |
| | 116 | Having light transmissive window |
| | 117 | Incorporating resilient component (e.g., spring, etc.) |
| | 118 | Including adhesive bonding step |
| | 120 | With vibration step |
| | 121 | Metallic housing or support |
| | 125 | Insulative housing or support |
| | 127 | Encapsulating |
| | 128 | MAKING DEVICE ARRAY AND SELECTIVELY INTERCONNECTING |
| | 129 | With electrical circuit layout |
| | 130 | Rendering selected devices operable or inoperable |
| | 131 | Using structure alterable to conductive state (i.e., antifuse) |
| | 132 | Using structure alterable to nonconductive state (i.e., fuse) |
| | 133 | MAKING REGENERATIVE-TYPE SWITCHING DEVICE (E.G., SCR, IGBT, THYRISTOR, ETC.) |
| | 134 | Bidirectional rectifier with control electrode (e.g., triac, diac, etc.) |
| | 135 | Having field effect structure |
| | 139 | Altering electrical characteristic |
| | 140 | Having structure increasing breakdown voltage (e.g., guard ring, field plate, etc.) |
| | 141 | MAKING CONDUCTIVITY MODULATION DEVICE (E.G., UNIJUNCTION TRANSISTOR, DOUBLE BASE DIODE, CONDUCTIVITY-MODULATED TRANSISTOR, ETC.) |
| | 142 | MAKING FIELD EFFECT DEVICE HAVING PAIR OF ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS |
| | 143 | Gettering of semiconductor substrate |
| | 144 | Charge transfer device (e.g., CCD, etc.) |
| | 145 | Having additional electrical device |
| | 146 | Majority signal carrier (e.g., buried or bulk channel, peristaltic, etc.) |
| | 147 | Changing width or direction of channel (e.g., meandering channel, etc.) |
| | 148 | Substantially incomplete signal charge transfer (e.g., bucket brigade, etc.) |
| | 149 | On insulating substrate or layer (e.g., TFT, etc.) |
| | 150 | Specified crystallographic orientation |
| | 151 | Having insulated gate |
| | 152 | Combined with electrical device not on insulating substrate or layer |
| | 154 | Complementary field effect transistors |
| | 155 | And additional electrical device on insulating substrate or layer |
| | 156 | Vertical channel |
| | 157 | Plural gate electrodes (e.g., dual gate, etc.) |
| | 158 | Inverted transistor structure |
| | 161 | Including source or drain electrode formation prior to semiconductor layer formation (i.e., staggered electrodes) |
| | 162 | Introduction of nondopant into semiconductor layer |
| | 163 | Adjusting channel dimension (e.g., providing lightly doped source or drain region, etc.) |
| | 164 | Semiconductor islands formed upon insulating substrate or layer (e.g., mesa formation, etc.) |
| | 166 | Including recrystallization step |
| | 167 | Having Schottky gate (e.g., MESFET, HEMT, etc.) |
| | 168 | Specified crystallographic orientation |
| | 169 | Complementary Schottky gate field effect transistors |
| | 170 | And bipolar device |
| | 171 | And passive electrical device (e.g., resistor, capacitor, etc.) |
| | 172 | Having heterojunction (e.g., HEMT, MODFET, etc.) |
| | 173 | Vertical channel |
| | 174 | Doping of semiconductive channel region beneath gate (e.g., threshold voltage adjustment, etc.) |
| | 175 | Buried channel |
| | 176 | Plural gate electrodes (e.g., dual gate, etc.) |
| | 177 | Closed or loop gate |
| | 178 | Elemental semiconductor |
| | 179 | Asymmetric |
| | 180 | Self-aligned |
| | 186 | Having junction gate (e.g., JFET, SIT, etc.) |
| | 187 | Specified crystallographic orientation |
| | 188 | Complementary junction gate field effect transistors |
| | 189 | And bipolar transistor |
| | 190 | And passive device (e.g., resistor, capacitor, etc.) |
| | 191 | Having heterojunction |
| | 192 | Vertical channel |
| | 194 | Doping of semiconductive channel region beneath gate (e.g., threshold voltage adjustment, etc.) |
| | 195 | Plural gate electrodes |
| | 196 | Including isolation structure |
| | 197 | Having insulated gate (e.g., IGFET, MISFET, MOSFET, etc.) |
| | 198 | Specified crystallographic orientation |
| | 199 | Complementary insulated gate field effect transistors (i.e., CMOS) |
| | 200 | And additional electrical device |
| | 201 | Including insulated gate field effect transistor having gate surrounded by dielectric (i.e., floating gate) |
| | 202 | Including bipolar transistor (i.e., BiCMOS) |
| | 203 |  Complementary bipolar transistors |
| | 204 | Lateral bipolar transistor |
| | 205 | Plural bipolar transistors of differing electrical characteristics |
| | 206 | Vertical channel insulated gate field effect transistor |
| | 207 | Including isolation structure |
| | 209 | Including additional vertical channel insulated gate field effect transistor |
| | 210 | Including passive device (e.g., resistor, capacitor, etc.) |
| | 211 | Having gate surrounded by dielectric (i.e., floating gate) |
| | 212 | Vertical channel |
| | 213 | Common active region |
| | 214 | Having underpass or crossunder |
| | 215 | Having fuse or integral short |
| | 216 | Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound |
| | 217 | Doping of semiconductor channel region beneath gate insulator (e.g., threshold voltage adjustment, etc.) |
| | 218 | Including isolation structure |
| | 219 | Total dielectric isolation |
| | 220 | Isolation by PN junction only |
| | 221 | Dielectric isolation formed by grooving and refilling with dielectric material |
| | 222 | With epitaxial semiconductor layer formation |
| | 223 | Having well structure of opposite conductivity type |
| | 225 | Recessed oxide formed by localized oxidation (i.e., LOCOS) |
| | 229 | Self-aligned |
| | 233 | And contact formation |
| | 234 | Including bipolar transistor (i.e., BiMOS) |
| | 237 | Including diode |
| | 238 | Including passive device (e.g., resistor, capacitor, etc.) |
| | 239 | Capacitor |
| | 240 | Having high dielectric constant insulator (e.g., Ta2O5, etc.) |
| | 241 | And additional field effect transistor (e.g., sense or access transistor, etc.) |
| | 243 | Trench capacitor |
| | 244 | Utilizing stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.) |
| | 245 | With epitaxial layer formed over the trench |
| | 246 | Including doping of trench surfaces |
| | 250 | Planar capacitor |
| | 253 | Stacked capacitor |
| | 257 | Having additional gate electrode surrounded by dielectric (i.e., floating gate) |
| | 258 | Including additional field effect transistor (e.g., sense or access transistor, etc.) |
| | 259 | Including forming gate electrode in trench or recess in substrate |
| | 260 | Textured surface of gate insulator or gate electrode |
| | 261 | Multiple interelectrode dielectrics or nonsilicon compound gate insulator |
| | 262 | Including elongated source or drain region disposed under thick oxide regions (e.g., buried or diffused bitline, etc.) |
| | 264 | Tunneling insulator |
| | 265 | Oxidizing sidewall of gate electrode |
| | 266 | Having additional, nonmemory control electrode or channel portion (e.g., for accessing field effect transistor structure, etc.) |
| | 268 | Vertical channel |
| | 269 | Utilizing epitaxial semiconductor layer grown through an opening in an insulating layer |
| | 270 | Gate electrode in trench or recess in semiconductor substrate |
| | 273 | Having integral short of source and base regions |
| | 275 | Making plural insulated gate field effect transistors of differing electrical characteristics |
| | 279 | Making plural insulated gate field effect transistors having common active region |
| | 280 | Having underpass or crossunder |
| | 281 | Having fuse or integral short |
| | 282 | Buried channel |
| | 283 | Plural gate electrodes (e.g., dual gate, etc.) |
| | 284 | Closed or loop gate |
| | 285 | Utilizing compound semiconductor |
| | 286 | Asymmetric |
| | 287 | Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound |
| | 288 | Having step of storing electrical charge in gate dielectric |
| | 289 | Doping of semiconductive channel region beneath gate insulator (e.g., adjusting threshold voltage, etc.) |
| | 290 | After formation of source or drain regions and gate electrode |
| | 291 | Using channel conductivity dopant of opposite type as that of source and drain |
| | 292 | Direct application of electrical current |
| | 293 | Fusion or solidification of semiconductor region |
| | 294 | Including isolation structure |
| | 295 | Total dielectric isolation |
| | 296 | Dielectric isolation formed by grooving and refilling with dielectric material |
| | 297 | Recessed oxide formed by localized oxidation (i.e., LOCOS) |
| | 299 | Self-aligned |
| | 300 | Having elevated source or drain (e.g., epitaxially formed source or drain, etc.) |
| | 301 | Source or drain doping |
| | 308 | Radiation or energy treatment modifying properties of semiconductor regions of substrate (e.g., thermal, corpuscular, electromagnetic, etc.) |
| | 309 | FORMING BIPOLAR TRANSISTOR BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS |
| | 310 | Gettering of semiconductor substrate |
| | 311 | On insulating substrate or layer (i.e., SOI type) |
| | 312 | Having heterojunction |
| | 313 | Complementary bipolar transistors |
| | 314 | And additional electrical device |
| | 315 | Forming inverted transistor structure |
| | 316 | Forming lateral transistor structure |
| | 317 | Wide bandgap emitter |
| | 318 | Including isolation structure |
| | 320 | Self-aligned |
| | 322 | Complementary bipolar transistors |
| | 323 | Having common active region (i.e., integrated injection logic (I2L), etc.) |
| | 326 | Including additional electrical device |
| | 327 | Having lateral bipolar transistor |
| | 328 | Including diode |
| | 329 | Including passive device (e.g., resistor, capacitor, etc.) |
| | 333 | Having fuse or integral short |
| | 334 | Forming inverted transistor structure |
| | 335 | Forming lateral transistor structure |
| | 336 | Combined with vertical bipolar transistor |
| | 337 | Active region formed along groove or exposed edge in semiconductor |
| | 338 | Having multiple emitter or collector structure |
| | 339 | Self-aligned |
| | 340 | Making plural bipolar transistors of differing electrical characteristics |
| | 341 | Using epitaxial lateral overgrowth |
| | 342 | Having multiple emitter or collector structure |
| | 343 | Mesa or stacked emitter |
| | 344 | Washed emitter |
| | 345 | Walled emitter |
| | 346 | Emitter dip prevention or utilization |
| | 347 | Permeable or metal base |
| | 348 | Sidewall base contact |
| | 349 | Pedestal base |
| | 350 | Forming base region of specified dopant concentration profile (e.g., inactive base region more heavily doped than active base region, etc.) |
| | 351 | Direct application of electrical current |
| | 352 | Fusion or solidification of semiconductor region |
| | 353 | Including isolation structure |
| | 354 | Having semi-insulative region |
| | 355 | Total dielectrical isolation |
| | 356 | Isolation by PN junction only |
| | 359 | Dielectric isolation formed by grooving and refilling with dielectrical material |
| | 360 | With epitaxial semiconductor formation in groove |
| | 361 | Including deposition of polysilicon or noninsulative material into groove |
| | 362 | Recessed oxide by localized oxidation (i.e., LOCOS) |
| | 364 | Self-aligned |
| | 365 | Forming active region from adjacent doped polycrystalline or amorphous semiconductor |
| | 366 | Having sidewall |
| | 368 | Simultaneously outdiffusing plural dopants from polysilicon or amorphous semiconductor |
| | 369 | Dopant implantation or diffusion |
| | 378 | Radiation or energy treatment modifying properties of semiconductor regions of substrate (e.g., thermal, corpuscular, electromagnetic, etc.) |
| | 379 | VOLTAGE VARIABLE CAPACITANCE DEVICE MANUFACTURE (E.G., VARACTOR, ETC.) |
| | 380 | AVALANCHE DIODE MANUFACTURE (E.G., IMPATT, TRAPPAT, ETC.) |
| | 381 | MAKING PASSIVE DEVICE (E.G., RESISTOR, CAPACITOR, ETC.) |
| | 382 | Resistor |
| | 386 | Trench capacitor |
| | 387 | Having stacked capacitor structure (e.g., stacked trench, buried stacked capacitor, etc.) |
| | 388 | With epitaxial layer formed over the trench |
| | 389 | Including doping of trench surfaces |
| | 393 | Planar capacitor |
| | 396 | Stacked capacitor |
| | 400 | FORMATION OF ELECTRICALLY ISOLATED LATERAL SEMICONDUCTIVE STRUCTURE |
| | 401 | Having substrate registration feature (e.g., alignment mark) |
| | 402 | And gettering of substrate |
| | 403 | Having semi-insulating component |
| | 404 | Total dielectric isolation |
| | 405 | And separate partially isolated semiconductor regions |
| | 406 | Bonding of plural semiconductive substrates |
| | 407 | Nondopant implantation |
| | 408 | With electrolytic treatment step |
| | 410 | Encroachment of separate locally oxidized regions |
| | 411 | Air isolation (e.g., beam lead supported semiconductor islands, etc.) |
| | 413 | With epitaxial semiconductor formation |
| | 414 | Isolation by PN junction only |
| | 421 | Having air-gap dielectric (e.g., groove, etc.) |
| | 423 | Implanting to form insulator |
| | 424 | Grooved and refilled with deposited dielectric material |
| | 425 | Combined with formation of recessed oxide by localized oxidation |
| | 427 | Refilling multiple grooves of different widths or depths |
| | 429 | And epitaxial semiconductor formation in groove |
| | 430 | And deposition of polysilicon or noninsulative material into groove |
| | 433 | Dopant addition |
| | 435 | Multiple insulative layers in groove |
| | 438 | Reflow of insulator |
| | 439 | Recessed oxide by localized oxidation (i.e., LOCOS) |
| | 440 | Including nondopant implantation |
| | 441 | With electrolytic treatment step |
| | 442 | With epitaxial semiconductor layer formation |
| | 443 | Etchback of recessed oxide |
| | 444 | Preliminary etching of groove |
| | 448 | Utilizing oxidation mask having polysilicon component |
| | 449 | Dopant addition |
| | 452 | Plural oxidation steps to form recessed oxide |
| | 453 | And electrical conductor formation (i.e., metallization) |
| | 454 | Field plate electrode |
| | 455 | BONDING OF PLURAL SEMICONDUCTOR SUBSTRATES |
| | 456 | Having enclosed cavity |
| | 457 | Warping of semiconductor substrate |
| | 458 | Subsequent separation into plural bodies (e.g., delaminating, dicing, etc.) |
| | 459 | Thinning of semiconductor substrate |
| | 460 | SEMICONDUCTOR SUBSTRATE DICING |
| | 461 | Beam lead formation |
| | 462 | Having specified scribe region structure (e.g., alignment mark, plural grooves, etc.) |
| | 463 | By electromagnetic irradiation (e.g., electron, laser, etc.) |
| | 464 | With attachment to temporary support or carrier |
| | 465 | Having a perfecting coating |
| | 466 | DIRECT APPLICATION OF ELECTRICAL CURRENT |
| | 467 | To alter conductivity of fuse or antifuse element |
| | 468 | Electromigration |
| | 469 | Utilizing pulsed current |
| | 470 | Fusion of semiconductor region |
| | 471 | GETTERING OF SUBSTRATE |
| | 472 | By vibrating or impacting |
| | 473 | By implanting or irradiating |
| | 476 | By layers which are coated, contacted, or diffused |
| | 477 | By vapor phase surface reaction |
| | 478 | FORMATION OF SEMICONDUCTIVE ACTIVE REGION ON ANY SUBSTRATE (E.G., FLUID GROWTH, DEPOSITION) |
| | 479 | On insulating substrate or layer |
| | 480 | Including implantation of ion which reacts with semiconductor substrate to form insulating layer |
| | 481 | Utilizing epitaxial lateral overgrowth |
| | 482 | Amorphous semiconductor |
| | 483 | Compound semiconductor |
| | 484 | Running length (e.g., sheet, strip, etc.) |
| | 485 | Deposition utilizing plasma (e.g., glow discharge, etc.) |
| | 486 | And subsequent crystallization |
| | 488 | Polycrystalline semiconductor |
| | 489 | Simultaneous single crystal formation |
| | 490 | Running length (e.g., sheet, strip, etc.) |
| | 491 | And subsequent doping of polycrystalline semiconductor |
| | 492 | Fluid growth step with preceding and subsequent diverse operation |
| | 493 | Plural fluid growth steps with intervening diverse operation |
| | 494 | Differential etching |
| | 495 | Doping of semiconductor |
| | 496 | Coating of semiconductive substrate with nonsemiconductive material |
| | 497 | Fluid growth from liquid combined with preceding diverse operation |
| | 500 | Fluid growth from liquid combined with subsequent diverse operation |
| | 503 | Fluid growth from gaseous state combined with preceding diverse operation |
| | 507 | Fluid growth from gaseous state combined with subsequent diverse operation |
| | 510 | INTRODUCTION OF CONDUCTIVITY MODIFYING DOPANT INTO SEMICONDUCTIVE MATERIAL |
| | 511 | Ordering or disordering |
| | 512 | Involving nuclear transmutation doping |
| | 513 | Plasma (e.g., glow discharge, etc.) |
| | 514 | Ion implantation of dopant into semiconductor region |
| | 515 | Ionized molecules |
| | 516 | Including charge neutralization |
| | 517 | Of semiconductor layer on insulating substrate or layer |
| | 518 | Of compound semiconductor |
| | 519 | Including multiple implantation steps |
| | 522 | Including heat treatment |
| | 523 | And contact formation (i.e., metallization) |
| | 524 | Into grooved semiconductor substrate region |
| | 525 | Using oblique beam |
| | 526 | Forming buried region |
| | 527 | Including multiple implantation steps |
| | 530 | Including heat treatment |
| | 531 | Using shadow mask |
| | 532 | Into polycrystalline region |
| | 533 | And contact formation (i.e., metallization) |
| | 535 | By application of corpuscular or electromagnetic radiation (e.g., electron, laser, etc.) |
| | 537 | Fusing dopant with substrate (i.e., alloy junction) |
